Design Exploration for Decimal Floating-Point Arithmetic

Commercial applications and databases typically store numerical data in decimal format. Currently, however, microprocessors do not provide instructions or hardware support for decimal floating-point arithmetic [ 1 ]. Consequently, decimal numbers are often read into computers, converted to binary numbers, and then processed using binary floating-point arithmetic. Results are then converted back to decimal before being stored. Besides being time-consuming, this process is error-prone, since most decimal numbers cannot be exactly represented as binary numbers [2,3]. Thus, if binary floating-point arithmetic is used to process decimal data, unexpected results may occur after a few computations [4]. In many commercial applications, including financial analysis, banking, tax calculation, currency conversions, insurance, accounting, and e-commerce, the errors introduced by converting between decimal and binary numbers are unacceptable and may violate legal accuracy requirements. Therefore, these applications often use software to perform decimal floating-point arithmetic. Although this approach eliminates errors due to converting between binary and decimal numbers, it leads to long execution times for numerically intensive commercial applications, since software implementations of decimal floating-point operation are typically 100 to 1,000 times slower than equivalent binary floating-point operations in hardware [ 5]. Due the growing importance of decimal floating-point arithmetic, specifications for it have recently been added to the draft revision of the IEEE 754 Standard for Floating-Point Arithmetic [6]. For this project, we will research, design, and evaluate instruction set extensions, arithmetic algorithms, and hardware designs for decimal floating-point arithmetic. We will also enhance computer simulators and compilers to better evaluate the benefits of hardware support for decimal floating-point arithmetic. This research will include: • Investigating decimal floating-point instruction set extensions. We will select these instructions based on (a) their usefulness in reducing the execution times of commercial applications, (b) their ability to meet the requirements of the revised IEEE 754 Standard, and (c) their anticipated ease of implementation on high-performance processors. To estimate the execution times of current decimal floating-point software, we will use the decNumber C library [7], commercial benchmarks, the SimpleScalar simulator [8], and the prof and gprof profiling tools. • Developing and analyzing novel arithmetic algorithms and hardware designs. We will investigate the use of specialized encodings, hardware sharing, parallel speculative result computation, carry-free decimal addition, and other techniques to improve the area, critical path delay, performance, and/or power consumption of decimal floating-point arithmetic. We will also